Hdl Works

HDL Works HDL Desing Entry EASE 8.3 R5 (Win/Lnx)  Software

Posted by speedzodiac_ at Aug. 31, 2016
HDL Works HDL Desing Entry EASE 8.3 R5 (Win/Lnx)

HDL Works HDL Desing Entry EASE 8.3 R5 (Win/Lnx) | 54.5 / 64 MB

EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you're creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language - VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.

HDL Works HDL Desing Entry EASE 8.3 R4  Software

Posted by big1ne at June 20, 2016
HDL Works HDL Desing Entry EASE 8.3 R4

HDL Works HDL Desing Entry EASE 8.3 R4 | 59.0 MB

EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you're creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language - VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.

HDL Works HDL Companion 2.9 R1 (Win/Lnx)  Software

Posted by Dizel_ at May 31, 2016
HDL Works HDL Companion 2.9 R1 (Win/Lnx)

HDL Works HDL Companion 2.9 R1 (Win/Lnx) | 39/39 Mb

HDL Companion is the HDL designer's Swiss army knife. It will help you to get and keep a good overview of any HDL design, including third party IP, legacy code and other HDL sources. Complete design directories and design files are dragged into HDL Companion and a complete design overview is created in seconds, uncovering information regarding numerous aspects of the design. The GUI offers many ways to navigate through the design and explore the details you're looking for.

HDL Works HDL Desing Entry EASE 8.3 R3 (Win/Lnx)  Software

Posted by speedzodiac_ at May 25, 2016
HDL Works HDL Desing Entry EASE 8.3 R3 (Win/Lnx)

HDL Works HDL Desing Entry EASE 8.3 R3 (Win/Lnx) | 54.5 / 64 MB

EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you're creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language - VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.

HDL Works IO Checker 3.2 R1 (Win/Lnx)  Software

Posted by speedzodiac_ at March 15, 2016
HDL Works IO Checker 3.2 R1 (Win/Lnx)

HDL Works IO Checker 3.2 R1 (Win/Lnx) | 49/48 MB

When using large FPGA's on a PCB making sure that the FPGA pins are connected to the right signals is a cumbersome task. On the FPGA side the pins are assigned to the HDL signals that form the toplevel of the logic implemented on the FPGA. On the PCB side the pins have to be connected to the proper net that will connect it to other components on the PCB. Because implementation of FPGA and PCB is often done in parallel, the signal names used are not always identical. To make things even worse, it is often necessary to perform pin swaps to prevent PCB routing problems. These pin swaps have to be made both on the FPGA and the PCB. As this is almost always manual work, and current devices have over 1500 pins, a mistake is easily made.

HDL Works HDL Desing Entry EASE 8.3 R2 (Win/Lnx)  Software

Posted by speedzodiac_ at March 15, 2016
HDL Works HDL Desing Entry EASE 8.3 R2 (Win/Lnx)

HDL Works HDL Desing Entry EASE 8.3 R2 (Win/Lnx) | 54.5 / 64 MB

EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you're creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language - VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.

HDL Works HDL Design Entry EASE 8.2.R8 (Win/Lnx)  Software

Posted by C2U at Nov. 27, 2015
HDL Works HDL Design Entry EASE 8.2.R8 (Win/Lnx)

HDL Works HDL Design Entry EASE 8.2.R8 (Win/Lnx) | 59/63.4 Mb

EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you're creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language - VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.

HDL Works HDL Desing Entry EASE 8.2 R7 (Win/Lnx)  

Posted by speedzodiac_ at Sept. 15, 2015
HDL Works HDL Desing Entry EASE 8.2 R7 (Win/Lnx)

HDL Works HDL Desing Entry EASE 8.2 R7 (Win/Lnx) | 54.5 / 64 MB

EASE offers the best of both worlds with your choice of graphical or text based HDL entry. You don’t need to be a master of either Verilog or VHDL. When you're creating a new design, just enter your design using your mix of graphics and text. EASE automatically generates optimized HDL code for you in the selected language - VHDL or Verilog. Industry standard version control environments deal with design and configuration management enabling multiple users to work simultaneously on one EASE project.

HDL Works IO Checker 3.1 R1 (Win/Lnx)  

Posted by Dizel_ at Aug. 26, 2015
HDL Works IO Checker 3.1 R1 (Win/Lnx)

HDL Works IO Checker 3.1 R1 (Win/Lnx) | 49/48 MB

When using large FPGA's on a PCB making sure that the FPGA pins are connected to the right signals is a cumbersome task. On the FPGA side the pins are assigned to the HDL signals that form the toplevel of the logic implemented on the FPGA. On the PCB side the pins have to be connected to the proper net that will connect it to other components on the PCB. Because implementation of FPGA and PCB is often done in parallel, the signal names used are not always identical. To make things even worse, it is often necessary to perform pin swaps to prevent PCB routing problems. These pin swaps have to be made both on the FPGA and the PCB. As this is almost always manual work, and current devices have over 1500 pins, a mistake is easily made.

HDL Works HDL Companion 2.8 R2 (Win/Lnx)  

Posted by Dizel_ at Aug. 26, 2015
HDL Works HDL Companion 2.8 R2 (Win/Lnx)

HDL Works HDL Companion 2.8 R2 (Win/Lnx) | 35/32 Mb

HDL Companion is the HDL designer's Swiss army knife. It will help you to get and keep a good overview of any HDL design, including third party IP, legacy code and other HDL sources. Complete design directories and design files are dragged into HDL Companion and a complete design overview is created in seconds, uncovering information regarding numerous aspects of the design. The GUI offers many ways to navigate through the design and explore the details you're looking for.